Design-Reuse

Xilinx and EV Engineering deliver MHz co-simulation with Virtex-II technology

Based on the advanced Virtex-IITM FPGAs ZeBu accelerates co-simulation of designs driven by Verilog/VHDL/C/C++/SystemC testbenches PARIS, France, April 22, 2002 ...
EDN

Xilinx ISE Design Suite 13.3 Full Custom Precision Floating-Point Support Extends Productivity for DSP Designers

“Compared to competing solutions, only System Generator for DSP provides developers with a bit accurate solution, meaning we can guarantee that the simulation model will match the hardware ...
Design-Reuse

ISE Design Suite 13 Kicks-off Broad Support for 7 Series FPGAs and Delivers Enhanced System Level Productivity With New Team Design Flow

Innovative tool and plug-and-play IP improvements which leverage open industry standards accelerate design creation, verification, implementation, and lower system power. SAN JOSE, Calif., March 8, ...
EDN

Xilinx ISE 8.1i boosts FPGA performance

Xilinx has announced the 8.1i release of its Integrated Software Environment (ISE) design tool suite, which features the new ISE Fmax technology with enhanced physical synthesis capabilities to ...
Linux Journal

Xilinx FPGA Design Tools for Linux

A field programmable gate array (FPGA) is a user-programmable piece of silicon constructed in very large-scale integration (VLSI) technology. The VLSI transistor-level detail is absolutely predefined ...
Electronic Design

Verification Techniques For FPGA Designs

With the increasing size and complexity of FPGA devices, there is a need for more efficient verification methods. Timing simulation can be the most revealing verification method; however, it is often ...
Electronic Design

FPGA Design Tool Brings More Modularity To FPGA Design

Xilinx's latest incarnation of its Integrated Synthesis Environment, ISE Design Suite 12, now brings features such as ‘intelligent’ clock-gating technology to its line of FPGAs as well as a new ...